JPS6256598B2 - - Google Patents

Info

Publication number
JPS6256598B2
JPS6256598B2 JP54046848A JP4684879A JPS6256598B2 JP S6256598 B2 JPS6256598 B2 JP S6256598B2 JP 54046848 A JP54046848 A JP 54046848A JP 4684879 A JP4684879 A JP 4684879A JP S6256598 B2 JPS6256598 B2 JP S6256598B2
Authority
JP
Japan
Prior art keywords
circuit
address
output
address input
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54046848A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55138128A (en
Inventor
Yasuo Akatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4684879A priority Critical patent/JPS55138128A/ja
Priority to US06/139,595 priority patent/US4337525A/en
Priority to EP80102068A priority patent/EP0017990B1/en
Priority to DE8080102068T priority patent/DE3070410D1/de
Publication of JPS55138128A publication Critical patent/JPS55138128A/ja
Publication of JPS6256598B2 publication Critical patent/JPS6256598B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Static Random-Access Memory (AREA)
JP4684879A 1979-04-17 1979-04-17 Memory circuit Granted JPS55138128A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP4684879A JPS55138128A (en) 1979-04-17 1979-04-17 Memory circuit
US06/139,595 US4337525A (en) 1979-04-17 1980-04-11 Asynchronous circuit responsive to changes in logic level
EP80102068A EP0017990B1 (en) 1979-04-17 1980-04-17 Integrated memory circuit
DE8080102068T DE3070410D1 (en) 1979-04-17 1980-04-17 Integrated memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4684879A JPS55138128A (en) 1979-04-17 1979-04-17 Memory circuit

Publications (2)

Publication Number Publication Date
JPS55138128A JPS55138128A (en) 1980-10-28
JPS6256598B2 true JPS6256598B2 (en]) 1987-11-26

Family

ID=12758752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4684879A Granted JPS55138128A (en) 1979-04-17 1979-04-17 Memory circuit

Country Status (1)

Country Link
JP (1) JPS55138128A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63190293U (en]) * 1987-05-29 1988-12-07

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6337889A (ja) * 1986-07-31 1988-02-18 Fujitsu Ltd メモリ装置
FR2619939B1 (fr) * 1987-09-01 1989-12-08 Thomson Semiconducteurs Circuit de detection de transitions d'adresses
JPS63200390A (ja) * 1987-12-25 1988-08-18 Toshiba Corp 半導体メモリ

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4159541A (en) * 1977-07-01 1979-06-26 Ncr Corporation Minimum pin memory device
JPS6057156B2 (ja) * 1978-05-24 1985-12-13 株式会社日立製作所 半導体メモリ装置
JPS6019600B2 (ja) * 1978-06-23 1985-05-16 株式会社東芝 半導体メモリ−

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63190293U (en]) * 1987-05-29 1988-12-07

Also Published As

Publication number Publication date
JPS55138128A (en) 1980-10-28

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